High-k dielectric materials have been investigated to replace conventional gate oxide layers due to excellent current-leakage reduction seen when using the high-k dielectric materials at the same equivalent-oxide-thickness (EOT). However, high-k dielectric materials also suffer poor mobility and high threshold voltage issues in the electric performance of devices.
U.S. Pat. No. 6,310,367 B1 to Yagishita et al. describes a strained Si and high-k gate dielectric Tx process wherein the concentration of Ge in the channel layer of the NMOSFET is lower that the concentration of Ge in the channel layer of the PMOSFET. The gate electrodes of the NMOSFET and the PMOSFET are made of metallic materials.
U.S. Pat. No. 5,357,119 to Wang et al. describes an SiGe and gate oxide process.
U.S. Pat. No. 6,353,249 B1 to Boyd et al. describes an SiGe substrate and high-k gate dielectric.
U.S. Pat. No. 6,271,094 B1 to Chooi et al. and U.S. Pat. No. 6,335,238 B1 to Hanttangady et al. are related SiGe substrate and high-k dielectric Tx patents.
U.S. Pat. No. 6,287,903 B1 to Okuno et al. describes a structure and method for a large-permittivity dielectric using a germanium layer.